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}
}
}
// --- Subsidiary functions
String getHeader() {
// TODO - re-implement using C-style strings
String header = "microseconds";
String colName;
for (byte i = 0; i <= maxIndex; i++) {
switch (channelSequence[i]) {
case A_0 | ADCref: colName = ",CH_0"; break;
case A_1 | ADCref: colName = ",CH_1"; break;
case A_2 | ADCref: colName = ",CH_2"; break;
case A_3 | ADCref: colName = ",CH_3"; break;
case A_4 | ADCref: colName = ",CH_4"; break;
case A_5 | ADCref: colName = ",CH_5"; break;
default: colName = ",unknown"; break;
}
header += colName;
}
return header;
}
void doLowLevelConfig() {
noInterrupts();
// Combine the ADC reference bits with the channel selection bits. Each value
// in channelSequence should be the complete value of ADMUX for recording the
// desired channel. Tables 23-3 and 23-4.
// TODO - make this separate from the user-specified channel selection array?
for (byte i = 0; i <= maxIndex; i++){
channelSequence[i] = channelSequence[i] | ADCref;
}
// Configure the Timer 0 Compare Match A interrupt.
OCR0A = 64; // Keep away from the overflow (0) so micros() can update.
bitSet(TIMSK0, OCIE0A); // Enable the interrupt.
// Configure Timer 1 Compare Match A interrupt to trigger @ freq Hz
TCCR1A = TCCR1B = TCNT1 = 0; // Clear Timer 1 settings.
TCCR1B = bit(WGM12) | bit(CS12); // Count @ 62500 Hz: CTC mode, prescaler = 256. Tables 15-5 and 15-5.
OCR1A = CTCmatch; // Count up to CTCmatch. Section 15.11.6.
bitSet(TIMSK1, OCIE1A); // Enable Output Compare Match A interrupt. Section 15.11.8.
// Enable the ADC-conversion-complete interrupt, configure ADC for
// single-conversion mode, and disable the ADC. Section 23.9.2.
ADCSRA |= bit(ADIE) | bit(ADIF); // sets these bits
ADCSRA &= ~(bit(ADATE) | bit(ADEN)); // clears these bits
ADMUX = channelSequence[0];
interrupts();
}
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